March 10th update: NVIDIA is poised to release the next generation of RTX 50 series graphics cards by the end of this year or early next year, with a high probability of featuring the new generation GDDR7 memory. However, there seems to be a discrepancy regarding the memory bus width compared to previous speculation.
Earlier rumors suggested that the RTX 50 series might reintroduce the long-absent 512-bit memory bus, significantly boosting bandwidth.
However, according to insights from reputable leaker @kopite7kimi, the memory configuration for the GB20x series cores is not significantly different from the existing AD10x series.
The core lineup of the Ada Lovelace architecture family consists of five variants: AD102, AD103, AD104, AD106, and AD107, with respective bus widths of 384, 256, 192, 128, and 128 bits.
Interestingly, both AD104 and AD106, compared to the previous GA104 and GA106 generations, see a reduction in bus width by one tier.
Similarly, the Blackwell architecture family reportedly comprises five variants: GB202, GB203, GB205, GB206, and GB207.
Thus, it's logical to assume that their bus width configurations remain at 384, 256, 192, 128, and 128 bits.
The effective frequency of GDDR7 memory starts at 32GHz, a one-third increase over GDDR6X at 24GHz. Paired with a 384-bit bus width, this provides a generous bandwidth of 1.5TB/s, eliminating the need for the much costlier 512-bit bus requiring a higher number of transistors.
Initially, GDDR7 memory's starting capacity remains at 2GB per module, with Micron stating that 3GB modules will enter mass production by 2025. Whether these will be available in time for the RTX 5090 remains uncertain, but if they are, it could potentially offer a staggering 36GB of memory!
The mid to high-end cores, GB202, GB203, and GB205, are all poised to be paired with GDDR7 memory, while the low-end GB206 and GB207 are unlikely candidates for this upgrade.
