On March 28th, Intel revealed the validation test platform for its upcoming ultra-low-power processor, Lunar Lake, set to be launched later this year. Similar to the bare die previously showcased by the company, this platform consists of three small chips (one likely serving as a placeholder and for structural integrity). Integrated on one side are two LPDDR5X memories, while the other three sides feature metal frames for protection and stability purposes.
The previous showcase samples
Further confirmation reveals that Lunar Lake consists of two separate modules: the MX Compute Die and the MMX SoC Die. The former is not manufactured using Intel 20A process, but instead utilizes TSMC's N3B process, equivalent to 3nm level.
It comprises 4 P cores based on Lion Cove architecture and 4 E cores based on Skymont architecture, none of which support hyper-threading, thus maxing out at 8 cores and 8 threads with no AVX-512 instruction set.
In comparison, Arrow Lake, spanning across desktops and laptops, shares the same architecture but employs Intel 20A process, offering significantly higher specifications and performance.
As for the GPU integrated graphics, Lunar Lake upgrades to the low-power version of the second-generation Battlemage architecture, Xe2-LPG, with a maximum of 8 Xe cores. However, the number of stream processors or execution units per core doubles compared to the first generation, totaling up to 1024 units.
According to internal tests, its performance can potentially double compared to Meteor Lake, which itself has already doubled.
Lunar Lake is set to be released later this year, focusing on the ultra-low-power sector, with offerings in 8W and 30W power levels.
